The inventive concepts relate to semiconductor packages and, more particularly, to semiconductor packages including stacked semiconductor chip arrangements.
There is a trend in the electronic industry to inexpensively fabricate lighter, smaller, faster, more multi-functional, higher performance and higher reliability electronic products. Advanced packaging techniques used to fabricate such products are important for achieving this trend. Such advanced techniques include chip scale packaging (CSP) techniques. CSP techniques may provide a small semiconductor package at a semiconductor chip scale.
High capacity semiconductor packages are also in demand. However, techniques capable of integrating a lot of cells in a limited area are needed in order to increase memory capacity. These techniques may require techniques for creating accurate and fine widths and spaces and thus, may entail a long development time. Research is being conducted to produce processes for realizing high integration of semiconductor packages using recently developed semiconductor chip and semiconductor packages, for example, a multi-chip package including three-dimensionally arranged semiconductor chips and semiconductor package structures including three-dimensionally arranged semiconductor packages.